NPUs in Microcontrollers: STM32N6, i.MX and More Explained

Artificial intelligence is beginning to move beyond cloud platforms and high-performance computers. More microcontrollers and embedded processors now include specialized hardware that lets them run machine-learning models right on the device.

A key part of this shift is the Neural Processing Unit, or NPU. Rather than asking a general-purpose CPU to handle every neural-network calculation, a system can offload demanding tasks to an NPU, often improving both speed and efficiency.

STMicroelectronics’ STM32N6 is one example. It pairs an Arm Cortex-M55 processor with the company’s Neural-ART accelerator and is rated for up to 600 GOPS of neural-network performance. NXP also provides AI acceleration in several product lines, including its i.MX application processors and certain microcontrollers.

These developments are opening previously impossible opportunities in computer vision, predictive maintenance, smart manufacturing, robotics, audio recognition, and intelligent IOT devices.

But what is an NPU, specifically? How is it different from a CPU or DSP? And before putting together applications for microcontrollers with the NPU support embedded engineers need to know exactly this?

This article will describe the technology, highlight some of the major hardware platforms, and discuss how the native AI acceleration is changing the way we are developing on embedded systems.

1. What Is an NPU in an Embedded System?

A Neural Processing Unit is a custom designed, hardware accelerator that performs the math of AI & ML models many operations common to AI and machine learning models include matrix multiplication, convolution, multiply-accumulate operations, activation functions and tensor processing.

A microcontroller usually runs on a CPU to execute firmware instructions. CPU runs application logic, peripheral configuration, interrupts and communication protocols, etc. It can also run ML algorithms however more complex neural nets can be too much for a tiny embedded processor to handle.

NPU overcomes this by allocating hardware resources to the neural-network operations that it supports. Rather than every calculation as a series of general-purpose CPU instructions, the system can offload suitable workloads to the accelerator.

Consider, for instance, a camera for an embedded application that must determine whether anyone is in a room. In that setting, the camera configuration, handling of application events, and reporting of detection results are handled by the CPU. Meanwhile, inferences that are required by a trained neural network are done on the NPU.

This can improve inference speed and energy efficiency too, just it depends on the model, hardware architecture, memory configuration, and software implementation.

It is hence imperative to note that an NPU is not a replacement for the CPU. CPU still plays a major role in coordinating application flow, executing operations not yet supported by the AI model, peripherals management, and process result returned by AI model.

The correct way to develop for embedded devices, of course, is to build the application with the CPU, NPU, memory subsystem, and peripheral interfaces all working together.

2. Why Are NPUs Being Integrated into Microcontrollers?

We are seeing the semiconductor vendors incorporate AI accelerators into their embedded hardware to keep up with the growing demand for sensors and algorithms to fuel the next age of intelligent devices.

In the past, many embedded devices have leveraged computer vision or deep, complex neural network applications, often offloading to external processors, vision modules, or cloud AI services. Such solutions still apply, but can carry some extra hardware costs, communication delays, networking dependencies and consume power we do not need to waver.

By integrating an NPU into an embedded processor, AI inference tasks can be performed on the edge. This approach is usually coined Edge AI.

Picture an industrial machine that continuously measures vibration and temperature. Under a classic configuration, these sensor measurements could simply be forwarded to some faraway server. An edge AI implementation would analyze the measurements locally for any patterns of of abnormal operation.

If the device detects something wrong, this can be used to raise a warning. It could also be connected to some pre-set response without having to transmit every measurement to the cloud.

It has a number of advantages. For example, it can cut down on communication latency, ensure improved operation during a loss of network connectivity, keep back the sheer volume of sensitive data that is transmitted overland, and reduce communication overhead. The true value of energy savings would, however, be dependent on the entire system, as it consists of the accelerator, memory accesses, sensors, and wireless connectivity.

Native AI acceleration offers developers the potential to build intelligent products into small hardware designs. However, the model must still fit the available memory, supported operators, performance requirements, and power budget.

3. STM32N6: Bringing Neural Processing to STM32 Microcontrollers

Forward with the STM32N6 series, the entire ecosystem of the STM32 is a huge step up for embedded AI. Instead of relying primarily on their CPU for neural-network inference as typical microcontrollers, except that STM32N6 is integrated with Neural-ART Accelerator that is a dedicated accelerator for running supported machine learning workloads with more efficiency.

With a maximum clock rate of up to 800 MHz, this | The STM32N6 family integrates an Arm Cortex-M55 CPU with 4.2 MB of embedded RAM, camera interfaces, an image signal processor, hardware multimedia acceleration, and an NPU that is advertised at up to 600 GOPS. This combination is tailored for applications demanding local AI inference in addition to real-time control and image processing.

Another application in mind is embedded computer vision. Devices equipped with a camera can capture images, process them in real time, and dump the input into a trained neural network to find objects, people or detect anomalies in vision. It is the NPU that assists the supported neural-network operations ; meanwhile, the Cortex-M55 manages the software and peripherals in the application.

Another area of application discussed was industrial inspection. A smart camera linked to a manufacturing system could process every product as it travels along it and determine whether there are issues. Local inference can eliminate the necessity of sending each picture over to a distant computer that could enable a more immediate response and save bandwidth.

The hardware on the STM32N6 is also capable of handling gesture recognition and audio analysis for applications that use a lower end machine learning model and the hardware-aware software pipeline.

Key STM32N6 capabilities

• Processor: Arm Cortex-M55 running at up to 800 MHz.
• AI acceleration: Neural-ART NPU with up to 600 GOPS advertised processing performance.
• Memory: 4.2 MB of embedded RAM.
• Computer vision: Camera interfaces and a dedicated image signal processor.
• Multimedia: Hardware support for H.264 and JPEG processing, plus graphics acceleration.
• Development ecosystem: ST's Edge AI tools and STM32 development environment.

For embedded developers, the important lesson is that the STM32N6 is not simply a conventional microcontroller running a smaller AI model. It is a platform designed to combine control-oriented firmware with accelerated neural-network inference and supporting multimedia hardware.

4. NXP i.MX and eIQ Neutron: Another Approach to Embedded AI

NXP is also enlarging the use of AI acceleration through its portfolio of embedded processors through their eIQ Neutron NPU technology.

One of the most relevant examples of this is the i.MX RT700. In contrast to an application processor, which primarily is for Linux-based computing, the RT700 is a crossover microcontroller aimed at applications that combine low-power operation, real-time processing, audio, graphics, and AI.

The i.MX RT700 integrates Arm Cortex-M33 processing cores, Cadence Tensilica DSPs, and an eIQ Neutron NPU. This platform that is designed as a smart home product, wearable, consumer medical device, and HMI has up to 7.5 MB of on-chip SRAM, providing a sizable memory resource for embedded workloads in development support from the vendor.

The architecture is relevant as it allows continuous sensor data processing while remaining responsive to user interactions. In practice, a wearable device could use DSP resources for audio processing, an NPU for classification or recognition models (applications that have support), and the application logic and process management on the CPU.

NXP also provides AI acceleration in the i.MX 93 family. These two cores (Cortex-A55 application core and Cortex-M33 real-time core) along with the Arm Ethos-U65 microNPU stack together in what can best be said to be an applications-processor platform complemented with a real-time subsystem, rather than a conventional microcontroller.

Hardware selection depends on the differentiators that are important to you. If you need a rich Linux environment, abundant connectivity, and a dedicated real-time control core, an i.MX 93 design might be what you're looking for. For convenient, embedded control, audio, and AI, a crossover MCU like the i.MX RT700 would be a great fit.

5. STM32N6 vs. NXP i.MX RT700 vs. i.MX 93

These platforms all support AI acceleration, but they target different system requirements.

These specifications are not intended as direct performance measurements. GOPS, TOPS, and vendor-reported acceleration multipliers can be derived from different operation definitions, precisions, models, and test conditions. Meaningful comparison needs to address key practical issues: inference latency of the model in question, power consumption, memory usage, covered operators and software integration effort.

In other words an STM32N6 could be an attractive choice for a camera-based industrial inspection device, whilst the i.MX RT700 may be more appropriate for a low-power voice-enabled user interface. On the other hand, an i.MX 93 can become a relevant choice when an application needs a richer operating environment and more general purpose application processing as well.

The very best choice ends up being related to the application instead of the peak accelerator spec, alone.

6. How Does an NPU Work With Embedded C?

A big question for engineers who develop embedded systems is figuring out how an NPU is meant to be accessed by a firmware written in C or C++.

In what follows, a developer will almost always train or pick a machine learning model, transform it into a supported format, prepare the model for the target accelerator, and embed it in the embedded application. At application run time, the CPU runs application logic and prepares the input data to call the model on the platform's AI runtime.

The NPU runs the neural-network operations it supports, and the application reaches decisions using the predictions it provides.

As an example, what if the device is a vibration-monitoring device that recognises unusual machine behaviour. The firmware captures sensor readings, creates a window of measurements, and feeds them into the model. If the model raises a red flag, the firmware can either trigger an alert or forward a diagnostic message.

A simplified C-style example of this workflow is shown below.

#include <stdint.h>
#include <stdbool.h>

/* Platform-specific AI functions */
void AI_Model_Init(void);
void AI_Run_Inference(const int16_t *input,
                      float *output);

int main(void)
{
    int16_t sensor_data[128];
    float prediction[2];

    System_Init();
    AI_Model_Init();

    while (1)
    {
        Sensor_Read_Window(sensor_data, 128);

        AI_Run_Inference(sensor_data, prediction);

        if (prediction[1] > 0.90f)
        {
            Activate_Alert();
        }
    }
}

This is an illustrative example, not a complete, compilable implementation. Functions such as System_Init(), Sensor_Read_Window(), and AI_Run_Inference() must be implemented using the actual device SDK and AI runtime. The input type, output format, threshold, and model initialization depend on the selected model and platform.

The example also assumes that inference can complete within the application's timing requirements. A production implementation must consider sensor acquisition, buffer ownership, execution time, error handling, and whether inference should run synchronously or in a separate task.

The important point is that developers can continue writing application logic in Embedded C while using platform-specific software to access the NPU.

7. AI Model Deployment: Why Software Tools Matter

An NPU component in a microcontroller represents only part of the challenge of developing an embedded AI application that has real world acceptance. There is also a need for a software toolchain that converts a trained model in the form of a saved package on the target hardware by any means possible.

Both of These models can be trained using frameworks such as TensorFlow or Pytorch. It is not always possible to use a model trained on a computer directly on an embedded NPU without conversion and optimization.

For devices with limited resources, model quantization is critical. It reduces the number of bits of numeric precision used for model weights and calculations, and, in many cases, allows a model to have a much leaner footprint and run faster. Whether or not accuracy suffers is highly dependent on the model, dataset, and quantization method.

The end-to-end deployment process normally involves selecting a model, gathering representative data, going through quantization when appropriate, converting it to whatever format is supported by the target runtime, and running the final model on the device to validate that it works as expected.

STM offers an Edge AI Dev Ecosystem to assist engineers in implementing AI solutions on its supported STM32 platforms, including STM32N6. NXP eIQ ecosystem provides tools for developing and deploying supported models on its AI-enabled processors and microcontrollers. A highly important factor to take into consideration is operator compatibility. Neural networks involve a variety of mathematical operations and not all operations are necessarily supported by a given NPU or its software runtime. If an operation is unsupported, it may arrive on the CPU if a valid fallback implementation was supplied or it may need to be modified in the model. You must evaluate the entire model, and not just assume the accelerator will run every layer.

8. What Applications Can Benefit From NPU-Enabled Microcontrollers?

NPUs cover a growing number of use cases in embedded applications.

• Industrial automation and predictive maintenance: Embedded AI can detect abnormal operating patterns by analyzing vibration, current, acoustic, and temperature measurements. By using local inference, industrial equipment can identify potential problems without constantly sending raw sensor data to an external server.
• Computer vision and smart cameras: Devices empowered by NPUs can run on the object-detection, classification, and segmentation models they support. Applications include occupancy detection visual inspection, gesture recognition and equipment monitoring. Platforms with dedicated camera interfaces and image-processing hardware can simplify the complete image-to-inference pipeline.
• Wearables and consumer electronics: Small devices can use local inference for activity recognition, presence detection, gesture-based interaction, and selected audio-processing tasks. Low-power designs are important particularly when an application requires the device to acquire and transmit data while powered by a small battery.
• Smart home and voice interfaces: These embedded processors with AI support can handle wake-word detection, sound classification, and other compatible audio models. KPIs for more complicated and data-intensive speech recognition or language-model workloads, require more compute resources, thus an NPU equipped microcontroller should not be automatically considered as a system capable of a full friendly-conversational AI solution.
• Automotive and robotics: Embedded AI can be used in matter of environment sensors, object recognition, gesture-based control, monitoring applications. For applications using device which requires safety-critical decisions additional validation and basic safety engineering should be done; an NPU alone is not enough to certify a system is safe to use.

The important benefit in all those applications is the ability to do supported inference locally while still achieving the responsiveness and control that are expected in embedded products.

9. Challenges of Using NPUs in Microcontrollers

Integrated NPUs provide clear advantages, but they also come with practical trade-offs.

Memory is a major concern. A neural network needs space for its parameters, temporary calculations, incoming data, and results. A microcontroller may have several megabytes of SRAM, yet a large model can still exceed that limit or demand careful allocation.

Power use depends on the whole system, not just the accelerator. An NPU may run supported tasks more efficiently than a CPU, but sensors, external memory, data processing, and continuous input collection all draw power too. For an accurate picture, measure the complete application rather than relying only on the NPU’s specifications.

Software support can also be limiting. Some models use operations or number formats that a particular NPU cannot handle. To make a model work, developers may need to adjust its design, reduce its precision, run unsupported parts on the CPU, or select different hardware.

Troubleshooting involves more than checking firmware. Developers must examine the model’s results as well as the application code. A model can run without errors and still make poor predictions if its training data is unsuitable, its input processing is incorrect, or real-world data differs from what it saw during training.

Security matters as well. Local processing can avoid sending raw data elsewhere, but it does not by itself prevent someone from altering the device, firmware, or model.

For these reasons, successful embedded AI depends on choosing suitable hardware, adapting the model to fit, and testing the entire system under realistic conditions.

10. How Should Embedded Engineers Get Started With NPU Development?

Engineers interested in NPU-equipped microcontrollers can develop the necessary skills step by step.

Begin with Embedded C and core microcontroller topics, such as pointers, memory handling, interrupts, timers, communication interfaces, and peripheral control. These fundamentals matter because an NPU is one part of a complete embedded system, not a replacement for the firmware around it.

Then get familiar with the basics of machine learning: classification, inference, training, quantization, and model evaluation. You don’t need to become a machine learning researcher, but you should know how a model takes in data and generates a prediction.

Next, select a platform that fits your intended project. The STM32N6 is a useful option for vision and AI projects in the STM32 ecosystem. The NXP i.MX RT700 may be a better fit for low-power devices focused on audio or interactive features.

Once you’ve chosen a platform, use the manufacturer’s development tools and sample projects to run a small model. Start with a manageable task, such as classifying images or detecting unusual sensor readings, before moving on to more demanding applications.

Finally, test the model on the actual hardware. Check its inference time, memory use, accuracy, and power consumption to see whether the platform meets your needs. For students and recent graduates, combining Embedded C, microcontroller architecture, introductory machine learning, and hands-on deployment offers a solid starting point in embedded AI.

Conclusion

Embedded systems are once more being transformed by NPUs with neural-network workloads that can, in the future, run on more powerful microcontrollers and embedded processors. In the case of the STM32N6 and NXP i.MX RT700 platforms, where a device leveraging dedicated AI acceleration to complement conventional processing, memory, peripherals, and software development tools.

This creation signifies opportunities for local computer vision, predictive maintenance, intelligent wearables, smart home devices, audio recognition, and other edge AI applications.

However, an integrated NPU does not eliminate the need for effective Embedded C coding, model optimization, memory management, hardware debugging, and rigorous testing. The success of an embedded AI application is dependent on the complete system comprising the model, accelerator, CPU, memory, software runtime, and power budget.

For those that want to get into embedded engineering, an understanding of how microcontrollers work with AI accelerators will become an ever more important skill. A future where embedded development does not merely writing firmware or doing neural network training separately but instead integrating the two to create streamlined, responsive, and dependable intelligent devices.